Microprocessor and Computer Architecture

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Intel 8085 Instructions

The Intel 8085 microprocessor supports five types of interrupts to handle different events or conditions.

• Interrupts provide a mechanism for the microprocessor to temporarily suspend its current task and respond to a specific event.

RST 7.5, RST 6.5, and RST 5.5 are hardware interrupts that are vectored to specific memory locations. They are often used for handling external events or for initiating specific routines.

• The interrupt vector addresses for these interrupts are 7.5 times the corresponding number (e.g., RST 7.5 vector address is 7.5 * 8 = 60).

The TRAP interrupt is a non-maskable interrupt that is intended for handling priority-level tasks or critical events.

• It has the highest priority among the interrupts in the Intel 8085.

• The INTE pin is used to enable or disable interrupts. When INTE is high, interrupts are enabled; when it is low, interrupts are disabled.

• The INT pin is the interrupt request pin. When an interrupt is requested, the microprocessor checks the status of the INTE pin.

• The INTR pin is another interrupt request pin that is used to request a hardware interrupt.

• If INTE is high and the microprocessor recognizes a high signal on the INTR pin, it acknowledges the external interrupt.

• These pins are used for serial communication and can be used to interrupt the microprocessor during serial data transfer.

  • When an interrupt is recognized, the microprocessor temporarily stops its current task and saves the address of the next instruction in the stack.
  • The microprocessor then transfers control to the corresponding interrupt service routine (ISR) located at the specific vector address.
  • After executing the ISR, the microprocessor retrieves the saved address from the stack and resumes normal program execution.

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