Questions and Answers

Brief answer questions:

1.) What is instruction cycle?

Ans: The instruction cycle, also known as the fetch-decode-execute cycle, is a fundamental concept in computer architecture that describes the process by which a computer executes instructions.

2.) What do you mean by Data and Address Bus?

The data bus is a bi-directional pathway used for transferring data between the CPU (Central Processing Unit), memory, and peripherals such as input/output devices.

The address bus is unidirectional and carries memory addresses from the CPU to memory or peripheral devices.

3.) Define DMA.

DMA stands for Direct Memory Access. It’s a feature of computer systems that allows certain hardware subsystems within the computer to access system memory for reading from or writing to it independently of the central processing unit (CPU).

4.) Explain about SAP2.

SAP2 is an improvement over SAP1, featuring a more advanced architecture. Similar to SAP1, SAP2 uses RAM for both instructions and data. It may have a larger memory capacity compared to SAP1.

5.) What do you Operation Code?

An operation code is the first part of an instruction that tells the computer what to do with the variable or data written beside it.

6.) Define Instruction Format.

The instruction formats are a sequence of bits (0 and 1). These bits, when grouped, are known as fields.

7.) What do you mean by Shift Microoperations.

Shift microoperations are fundamental operations that involve shifting the binary digits (bits) of a binary number to the left or right by a certain number of positions.

8.) Define CISC architecture.

CISC stands for Complex Instruction Set Computer that represents a type of computer architecture design that features a large set of complex instructions.

9.) What do you mean by Memory Hierarchy?

Memory hierarchy refers to the arrangement of different types of memory storage devices in a computer system, organized in a hierarchy based on their speed, capacity, and cost.

10.) Define Data Dependency.

Data dependency refers to the relationship between instructions in a computer program, where the execution of one instruction relies on the result produced by another instruction.

11.) List out the components of a microprocessor.

A microprocessor consists of the Arithmetic Logic Unit (ALU), Control Unit (CU), registers, and system buses (address, data, and control).

12.) Name the Pin that are used for DMA operation in 8085 microprocessor.

The 8085 microprocessor uses the HOLD and HLDA (Hold Acknowledge) pins to perform Direct Memory Access (DMA) operations.

13.) Differentiate between shift right and arithmetic shift right operation.

Shift right fills the leftmost bit with zero, while arithmetic shift right preserves the sign bit (MSB), which is used for signed numbers.

14.) What is data transfer instruction?

A data transfer instruction is used to move data from one location to another, such as between registers and memory.

15.) What is data dependency problem in pipelining system?

Data dependency occurs when an instruction depends on the result of a previous instruction, which can delay pipeline execution.

16.) Define relative addressing mode.

Relative addressing mode uses an offset value added to the program counter to determine the effective memory address.

17.) Why we need I/O interface?

An I/O interface is required to enable communication between the microprocessor and input/output devices.

18.) What is the limitation of associative memory?

The major limitation of associative memory is its high cost and complexity, especially for large capacity implementations.

19.) Write down microoperation for POP operation in register stack.

The POP operation typically involves reading data from the memory location pointed to by the Stack Pointer (SP), incrementing SP, and loading the data into a specified register.

20.) What is microoperation?

A microoperation is a basic operation performed on the data stored in registers during the execution of an instruction.

21.) If the content of register is 1011, what will be its value after Arithmetic right shift?

After an arithmetic right shift, 1011 becomes 1101, as the sign bit (1) is preserved on the left.

22.) What is the use of W and Z register in 8085 microprocessor?

The W and Z registers are temporary registers used internally by the 8085 microprocessor to hold 16-bit addresses during execution of CALL and JMP instructions.

23.) List out any four Data transfer instruction.

Four data transfer instructions are: MOV, MVI, LDA, and STA.

24.) Define I/O interface.

An I/O interface is a connection system that allows the microprocessor to communicate and exchange data with peripheral devices.

25.) Define register indirect addressing mode.

In register indirect addressing mode, the memory address of the operand is stored in a register pair such as HL, and the instruction accesses the operand through this address.

26.) What is cache hit ratio?

Cache hit ratio is the percentage of memory accesses that are successfully served by the cache without accessing main memory.

27.) What is resource conflict problem?

A resource conflict occurs in pipelining when two instructions require the same hardware resource at the same time, causing delays.

28.) List any three characteristics of 8085 microprocessor.

Three characteristics of the 8085 microprocessor are: it is an 8-bit processor, it has a 16-bit address bus, and it operates at a clock speed of up to 3 MHz.

29.) Define Accumulator.

The accumulator is a special-purpose register in the microprocessor used to store intermediate arithmetic and logic results.

Short Answers Questions

1.) Write an Assembly language program to swap two 8-bit numbers.

To swap two 8-bit numbers in 8085 assembly language: This program swaps the contents of memory locations 3000H and 3001H.

LXI H, 3000H    ; Load address of first number  
MOV A, M        ; Load value at 3000H into A  
INX H           ; Point to 3001H  
MOV B, M        ; Load value at 3001H into B  
MOV M, A        ; Store value of A at 3001H  
DCX H           ; Go back to 3000H  
MOV M, B        ; Store value of B at 3000H  
HLT             ; Halt the program

2.) Explain the hardware organization of associative memory.

Associative memory (also called content-addressable memory) allows data retrieval based on content rather than address. Its hardware consists of:

• A memory array where each word has its own comparison logic.
• A parallel comparator in each word line compares stored data with the search input.
• A match register that stores which word matched.
• A control logic to read or write based on match status.

3.) Explain push and pop operations in register stack.

In the 8085 microprocessor, the PUSH operation stores data from register pair onto the stack, while POP retrieves data from the stack into a register pair.

• PUSH B: Decreases Stack Pointer (SP) by 2 and stores contents of B and C registers.
• POP B: Loads data from top of stack into C and B registers, then increments SP by 2.

4.) Describe flags register present in 8085 microprocessor.

The 8085 Flags Register is an 8-bit register containing five condition flags:

• Sign Flag (S) – Set if the result is negative.
• Zero Flag (Z) – Set if the result is zero.
• Auxiliary Carry (AC) – Used in BCD operations.
• Parity Flag (P) – Set if result has even number of 1s.
• Carry Flag (CY) – Set if there is a carry out of MSB in arithmetic operations.

5.) Explain 4-bit binary adder subtractor.

A 4-bit binary adder-subtractor performs both addition and subtraction using XOR gates and full adders:

• For addition, it adds two 4-bit binary numbers.

• For subtraction, it inverts the second number and adds 1 (2’s complement), enabling subtraction.
• The circuit uses a control signal to toggle between add/subtract mode and outputs the result along with carry/borrow.

6.) Describe Interrupt Initiated I/O.

Interrupt Initiated I/O allows peripheral devices to signal the processor when they are ready to transfer data.

• Instead of polling, the processor responds only when interrupted.

• This increases efficiency as CPU can perform other tasks until needed.
• Common in real-time systems, it uses hardware lines (like INTR in 8085) and an interrupt service routine (ISR) to handle the request.

7.) Explain any two types of priority interrupt.

• Software Priority Interrupt: Interrupts are prioritized by software instructions, often using polling techniques.

• Hardware Priority Interrupt: Interrupts are assigned fixed priorities by hardware, and higher-priority interrupts can preempt lower-priority ones.

8.) Illustrate and explain the bus structure of microprocessor system.

A microprocessor uses three main buses:

• Data Bus: Transfers data between CPU, memory, and I/O devices.
• Address Bus: Carries memory addresses.
• Control Bus: Carries control signals like read/write commands.
  These buses form the communication backbone of the microprocessor system.

9.) Describe any three addressing modes available in 8085 microprocessor.

• Immediate Addressing: Data is specified in the instruction itself.
• Direct Addressing: The address of the operand is directly given.
• Register Addressing: The operand is located in a register.

10.) Illustrate and explain the importance of memory hierarchy.

Memory hierarchy arranges storage in levels based on speed and cost. Faster, smaller memories like registers and cache are placed at the top, while slower, larger ones like hard disks are at the bottom. It optimizes performance and cost-efficiency.

11.) Describe 4-bit binary incrementer with its block diagram.

A 4-bit binary incrementer adds 1 to a 4-bit binary number using half-adders or logic gates. It’s used in counters and control units. (Block diagram typically shows 4 full adders or logic blocks connected in series.)

12.) What are the differences between RISC and CISC architecture?

RISC (Reduced Instruction Set Computer) uses simple, fast instructions, typically one per cycle.

CISC (Complex Instruction Set Computer) uses complex instructions, often requiring multiple cycles.
RISC is better for pipelining; CISC is better for complex operations in fewer lines of code.

13.) Differentiate between the microprocessor and Computer Architecture.

14. Discuss the Intel 8085 Instructions.

Intel 8085 instructions are categorized into 5 types:

• Data Transfer Instructions: Move data (e.g., MOV, MVI, LDA).
• Arithmetic Instructions: Perform arithmetic (e.g., ADD, SUB, INR).
• Logical Instructions: Bitwise operations (e.g., ANA, ORA, CMP).
• Branching Instructions: Control program flow (JMP, CALL, RET).
• Machine Control Instructions: Control the processor (HLT, NOP, DI).

Each instruction is executed in a sequence of fetch-decode-execute cycles.

15. Explain the Arithmetic Microoperations with example.

Arithmetic microoperation is such type of microoperation which performs arithmetic operation on numeric data stored in the registers.

The basic arithmetic microoperations are:

Adding:

• In addition micro-operation, the value in register R1 is added to the value in the register R2 and then the sum is transferred into register R3. 

Subtraction:

• In subtraction micro-operation, the contents of register R2 are subtracted from contents of the register R1, and then the result is transferred into R3. 

Increment:

• In Increment micro-operation, the value inside the R1 register is increased by 1

Decrement:

• In Decrement micro-operation, the value inside the R1 register is decreased by 1. 

Example: If R2 = 5 and R3 = 3, then R1 ← R2 + R3 results in R1 = 8.
These operations are performed by the Arithmetic Logic Unit (ALU).

16.) Discus the Symbolic Microinstructions

Symbolic microinstructions are human-readable representations of micro-operations written using symbolic notation. They simplify the design and understanding of control units.

Example:

T1: MAR ← PC  
T2: MBR ← M[MAR], PC ← PC + 1  
T3: IR ← MBR

This sequence shows the instruction fetch phase symbolically. Each line represents a clock cycle (T1, T2, etc.) and the corresponding microoperations.

17.) Explain the Control Unit of Basic Computer.

The control unit is responsible for directing operations in the processor by generating control signals. It has:

• Instruction Register (IR): Holds the current instruction.
• Decoder: Decodes the opcode.
• Control Logic Gates: Generate control signals for data movement and ALU operations.
• Timing Signals: Coordinate operations via clock cycles.

The control unit ensures that the correct sequence of micro-operations is executed for each instruction.

18.) Explain I/O Processor with example.

An I/O Processor (IOP) is a dedicated processor used to manage input/output operations, offloading tasks from the CPU.

• It has its own instruction set and can communicate with peripheral devices directly.
• The CPU issues commands to the IOP, and the IOP completes the task independently.

Example: In a system with DMA, the I/O processor handles disk data transfer without CPU involvement, improving efficiency.

Long Answer Questions

1.) Explain any three types of program control instruction.

Program control instructions alter the sequence of program execution. Three common types are:

• Jump (JMP) – Transfers control to another part of the program. Example: JMP 2050H sends execution to memory location 2050H.

• Call (CALL) – Invokes a subroutine and saves the return address on the stack. Execution resumes at the subroutine’s address.

• Return (RET) – Returns control from a subroutine to the main program by popping the saved address from the stack.

These instructions are essential for decision-making, loops, and modular programming.

2.) Multiply (+15) with (+5) using signed magnitude multiplication algorithm.

In signed magnitude multiplication, only the magnitudes are multiplied, and the sign is determined separately.

• +15 in binary (signed 5-bit): 01111
• +5 in binary (signed 5-bit): 00101

Steps:

• Multiply 1111 × 0101 (magnitude only).

3.) Illustrate and explain four-segment instruction pipeline.

A four-segment instruction pipeline divides the instruction execution process into four sequential stages. Each stage handles one part of the instruction cycle, allowing multiple instructions to be processed simultaneously:

• Instruction Fetch (IF): The instruction is fetched from memory.
• Instruction Decode (ID): The instruction is decoded to determine the operation and operands.
• Execution (EX): The operation is performed using the ALU or control logic.
• Write Back (WB): The result is written back to the register or memory.

Each instruction passes through all four stages. While one instruction is in the decode stage, another can be fetched, and another executed. This increases instruction throughput and improves CPU performance by reducing the average time per instruction.

4.) Explain any two types of cache mapping techniques.

Cache mapping determines how main memory blocks are placed in cache memory. Two common techniques are:

Direct Mapping:

• Each memory block maps to exactly one location in the cache.
• The cache address is calculated using:
  Cache Line = (Block Number) MOD (Number of Cache Lines)
• Advantages: Simple and fast.
• Disadvantages: Prone to frequent conflicts if multiple blocks map to the same line.

Associative Mapping:

• A block can be stored in any cache line.
• Each line has a tag that stores the block address.
• Advantages: Very flexible and efficient.
• Disadvantages: Expensive and slower due to the need to search the entire cache.

5.) Explain the memory mapping function with example.

Memory mapping refers to the process of associating different types of memory or storage to specific address ranges in a computer’s memory space.

• It is essential in both the CPU and peripheral devices to determine how the processor accesses data stored in different parts of memory or I/O space.

• It can involve mapping physical memory addresses to logical memory addresses, enabling the CPU to access the memory.

Types:

• Linear Memory Mapping: Simple memory addresses are assigned linearly from start to end without any gaps.

• Paged Memory Mapping: Memory is divided into fixed-size pages, and each page is mapped to an address in memory.

• Segmented Memory Mapping: Different segments, like code, data, and stack segments, are mapped to separate areas in memory.

Example:
Consider a microprocessor with the following memory map:

• 0x0000 to 0x1FFF: RAM (Random Access Memory)
• 0x2000 to 0x3FFF: ROM (Read-Only Memory)
• 0x4000 to 0x5FFF: I/O Devices (like printers or sensors)

When the CPU accesses the address 0x1000, it points to a location in RAM, whereas when it accesses the address 0x3000, it accesses ROM. Similarly, for I/O devices, addresses like 0x4500 might correspond to data registers for a printer.

6.) Multiply -7×8 using Booth multiplication algorithm.

7.) Explain with example of Arithmetic Pipeline.

An arithmetic pipeline refers to the process of breaking down arithmetic operations into multiple stages, allowing the processor to perform different parts of the operation in parallel, thus speeding up computation.

Arithmetic Pipeline Stages:

• Stage 1 (Fetch): The operation is fetched from the instruction memory.
• Stage 2 (Decode): The instruction is decoded to understand which arithmetic operation needs to be performed.
• Stage 3 (Execute): The arithmetic operation is executed (e.g., addition, subtraction).
• Stage 4 (Store/Write Back): The result of the operation is written back to the register or memory.

Example:
Consider an example where we want to calculate the result of the following arithmetic operations:
R=(A+B)∗C

• Step 1: In the first cycle, the CPU fetches the instruction to add A and B (A + B).
• Step 2: The result of A + B is stored temporarily.
• Step 3: While the CPU continues to the next instruction (multiplying the result by C), it can execute other instructions simultaneously.
• Step 4: Once the multiplication is done, the result is written back to the register or memory.

This approach improves throughput because multiple operations are being worked on at the same time, rather than sequentially.

8.) Describe the Data Transfer instruction.

Data Transfer instructions in a microprocessor are responsible for moving data between registers, memory, or I/O devices. These instructions do not involve arithmetic or logic operations but simply move data from one location to another.

Common Data Transfer Instructions:

• MOV (Move): Moves data from a source to a destination.
  • Example: MOV A, B (Moves the value in register B to register A).
• MVI (Move Immediate): Moves an immediate value into a register or memory location.
  • Example: MVI A, 05H (Moves the immediate value 05H into register A).
• LDA (Load Accumulator): Loads data from a memory location into the accumulator.
  • Example: LDA 2000H (Loads data from memory location 2000H into the accumulator).
• STA (Store Accumulator): Stores the content of the accumulator into a memory location.
  • Example: STA 3000H (Stores the content of the accumulator into memory location 3000H).
• IN (Input): Transfers data from an I/O device to a register.
  • Example: IN 01H (Reads data from I/O port 01H into a register).
• OUT (Output): Transfers data from a register to an I/O device.
  • Example: OUT 01H (Writes the content of a register to I/O port 01H).

Comprehensive Questions

1.) Explain the main purpose of addressing mode techniques use in the computers? Mention the different types of addressing modes.

Addressing modes are techniques used in computer architecture to specify how and where the operand (data) of an instruction is accessed. The main purpose of addressing mode techniques is to provide flexibility in accessing operands and to enhance the efficiency and capability of instructions.

Why Addressing Modes are Used:

• Flexibility in Data Access:
  • Allows operands to be located in registers, memory, or provided as immediate data.

• Efficient Use of Instructions:
  • Reduces the number of instructions required to perform complex operations.

• Code Optimization:
  • Helps in writing compact and faster executing code by using suitable operand referencing.

• Support for Complex Data Structures:
  • Enables referencing arrays, pointers, and stacks effectively.

• Program Control:
  • Some modes are used for controlling program flow (like PC-relative addressing).

Different Types of Addressing Modes:

• Immediate Addressing Mode:
  • In immediate addressing mode, the operand is directly specified within the instruction itself.

• Register Addressing Mode:
  • In register addressing mode, the operand is located in a processor register and the instruction specifies the register.

• Direct Addressing Mode:
  • In direct addressing mode, the effective memory address of the operand is explicitly stated in the instruction.

• Indirect Addressing Mode:
  • In indirect addressing mode, the instruction specifies a register or memory location that contains the address of the operand.

• Register Indirect Addressing Mode:
  • The address of the operand is stored in a register. Provides flexibility similar to indirect addressing but with potentially faster access.

• Indexed Addressing Mode:
  • In indexed addressing mode, the effective address of the operand is obtained by adding a constant value (index) to the contents of an index register.

• Base Register Addressing Mode:
  • In base register addressing mode, the effective address of the operand is determined by adding a displacement to the contents of a base register.

• Relative Addressing Mode:
  • In relative addressing mode, the operand’s address is calculated by adding a fixed offset to the current value of the program counter.

• Implied (Implicit) Addressing Mode:
  • In implied addressing mode, the operand is implicitly specified by the instruction itself and does not appear separately.

2.) Differentiate between restoring and non restoring division. Divide 7/3 using non restoring division.